The LCMXO3L-640E-5MG121C MachXO3™ device family is an ultra-low density family supporting state-of-the-art programmable bridging and I/O expansion. It has breakthrough I/O density and the lowest cost per I/O. Device I/O features have integrated support for the latest industry standard I/O.

The MachXO3L/LF family of low-power, instant-on, nonvolatile PLDs is available in five device densities ranging from 640 to 9400 look-up tables (LUTs). In addition to low-cost LUT-based programmable logic, these devices feature embedded block RAM (EBR), distributed RAM, phase-locked loop (PLL), pre-designed source synchronous I/O support, advanced configuration support, including dual-boot common capabilities and enhanced version features such as SPI controller, I2C controller and timer/counter. MachXO3LF devices also support user memory (UFM). These features allow these devices to be used in low-cost, high-volume applications such as consumer electronics, computing and storage, wireless communications, industrial control and automotive systems.

Product parameters:

Product Category: FPGA - Field Programmable Gate Array

RoHS: Details

Series: LCMXO3L

Number of logic elements: 640 LE

Number of I/Os: 100 I/O

Supply Voltage - Min: 1.14 V

Supply Voltage - Max: 1.26 V

Minimum working temperature: 0 C

Maximum working temperature: + 85 C

Data rate: 900 Mb/s

Installation style: SMD/SMT

Package / Box: CSFBGA-121

Trademark: Lattice

Distributed RAM: 5 kbit

Embedded Block RAM - EBR: 64 kbit

Maximum operating frequency: 400 MHz

Humidity Sensitivity: Yes

Number of Logical Array Blocks - LAB: 80 LAB

Operating supply voltage: 1.2 V

Product Type: FPGA - Field Programmable Gate Array

Subcategory: Programmable Logic ICs

Brand name: MachXO3