Shenzhen Meiyuxin Technology Co., Ltd.【Sell Ethernet Chip】Sell KSZ8895MQXIA 5-port 10/100 Ethernet switch supporting optical fiber Quality assurance! ! !

Product Description:

The KSZ8895MQXIA is a highly integrated Layer 2 managed five-port switch with numerous features designed to reduce system cost. The KSZ8895 is qualified to automotive standards (AEC-Q100).

The KSZ8895 series is designed for cost-sensitive 10/100Mbps five-port switch systems with low power consumption requirements. Combining on-chip termination and an internal LDO regulator helps minimize system cost. The KSZ8895 series supports high-performance memory bandwidth and a non-blocking configuration based shared memory switch fabric.

The KSZ8895 series also includes an extensive feature set including: power management, programmable rate limiting and priority ratios, tag/port based VLAN, packet filtering, four-queue QoS prioritization, management interface and MIB counters.

KSZ8895MQXIA The KSZ8895 series provides multiple CPU data interfaces to effectively address current and emerging Fast Ethernet applications when port 5 is configured to separate MAC5 with SW5-MII/RMII and PHY5 with P5-MII/RMII interfaces.

The KSZ8895 series offers three configurations to flexibly meet different requirements:

• There are 5 10/100Base-T/TX transceivers, 1 SW5-MII and 1 P5-MII interface

• There are 5 10/100Base-T/TX transceivers, 1 SW5-RMII and 1 P5-RMII interface

• Four 10/100Base-T/TX transceivers on ports 1, 2, 3 and 5 (port 3 can be set to fiber mode). There is a 100Base-FX transceiver on port 4. 1 SW5-MII and 1 P5-MII interface

• All registers of MAC and PHY unit can be managed through SPI or SMI interface. The MIIM registers can be accessed through the MDC/MDIO interface.

KSZ8895MQXIA can set all control registers for non-supervisor mode. KSZ8895MQX/RQX/FQX is packaged in 128-pin PQFP. The KSZ8895ML comes in a 128-pin LQFP package.

Features:

• Advanced switching functions

• IEEE 802.1q VLAN supports up to 128 active VLAN groups (full range of 4096 VLAN IDs)

• Static MAC table supports up to 32 entries

• VLAN ID tagging/untagging options on a per port basis

• Comprehensive configuration register access

• Serial management interface (MDC/MDIO) for all PHY registers and SMI interface (MDC/MDIO) for all registers

• High-speed SPI (up to 25MHz) and I2C master interface to all internal registers

• I/0 pin strapping and EEPROM to program optional registers in unmanaged switch mode

• QoS/CoS packet prioritization support

• Per port, 802.1p and DiffServ based

• 1/2/4 queue QoS priority selection

• Programmable weighted fair queuing for proportional control

• Integrated 5-port 10/100 Ethernet switch

• A new generation of 5MAC5PHY switches fully compliant with the IEEE 802.3u standard

• PHY designed with patented Enhanced Mixed-Signal Technology

• Non-blocking switch fabric ensures fast packet transfer by using 1K MAC address lookup table and store-and-forward architecture

• Switch monitoring function

• Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII

• MIB counters for full compliance statistics collect 34 MIB counters per port

• Loopback support for MAC, PHY and fault remote diagnostics

• Low power consumption

• Full-chip software power-down and per-port software power-down

• Energy detect mode supports <100mW full-chip power consumption when all ports are inactive