CY8C5868AXI-LP032 PSoC® 5LP is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a microcontroller on a single chip. The PSoC 5LP architecture boosts performance through:

 32-bit Arm Cortex-M3 core plus DMA controller and digital filter processor, at up to 80 MHz

 Ultra low power with industry's widest voltage range

 Programmable digital and analog peripherals enable custom functions

 Flexible routing of any analog or digital peripheral function to any pin

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.

Operating characteristics

Voltage range: 1.71 to 5.5 V, up to 6 power domains

Temperature range (ambient): –40 to 85 °C [1]

Extended temperature parts: –40 to 105 °C

DC to 80-MHz operation

Power modes

• Active mode 3.1 mA at 6 MHz, and 15.4 mA at 48 MHz

• 2-µA sleep mode

• 300-nA hibernate mode with RAM retention

Boost regulator from 0.5-V input up to 5-V output

Performance

32-bit Arm Cortex-M3 CPU, 32 interrupt inputs

24-channel direct memory access (DMA) controller

24-bit 64-tap fixed-point digital filter processor (DFB)

Memories

Up to 256 KB program flash, with cache and security features

Up to 32 KB additional flash for error correcting code (ECC)

Up to 64 KB RAM

2 KB EEPROM

Digital peripherals

Four 16-bit timer, counter, and PWM (TCPWM) blocks

2C, 1 Mbps bus speed

USB 2.0 certified Full-Speed (FS) 12 Mbps peripheral inter- face (TID#10840032) using internal oscillator[2]

Full CAN 2.0b, 16 Rx, 8 Tx buffers

20 to 24 universal digital blocks (UDB), programmable to create any number of functions:

• 8-, 16-, 24-, and 32-bit timers, counters, and PWMs

• I2C, UART, SPI, I2S, LIN 2.0 interfaces

• Cyclic redundancy check (CRC)

• Pseudo random sequence (PRS) generators

• Quadrature decoders

• Gate-level logic functions