Shenzhen Meiyuxin Technology Co., Ltd. [distributing automotive MCU] supply SAK-TC297TA-128F300S BC AURIX microcontroller MCU quality assurance brand new original! ! !

Features:

The TC29x product family has the following features:

• High performance microcontroller with three CPU cores

• Two 32-bit superscalar TriCore CPUs (TC1.6P), each with the following features:

– Excellent real-time performance

– Powerful bit manipulation

– Fully integrated DSP functions

– Multiply-accumulate unit capable of sustaining 2 MAC operations per cycle

– Operates at up to 300 MHz over temperature

– Up to 120 / 240 KB Data Scratchpad RAM (DSPR)

– Up to 32 KB of instruction scratchpad RAM (PSPR)

– 16 / 32 KB instruction cache (ICACHE)

– 8 KB data cache (DCACHE)

• Lockstep Shadow Core for TC1.6P Core 1

• Multiple on-chip memories

– All embedded NVM and SRAM are ECC protected

– Up to 8 MB program flash memory (PFLASH)

– Up to 768 KB of data flash memory (DFLASH) available for EEPROM emulation

– 32 KB RAM (LMU)

– Boot Read Only Memory (BROM)

• 128-channel DMA controller with secure data transfer

• Advanced interrupt system (ECC protection)

• High-performance on-chip bus structure

– 64-bit cross-connect interconnect (SRI) for fast parallel access between bus masters, CPU, and memory

– 32-bit System Peripheral Bus (SPB) for on-chip peripherals and functional units

– A bus bridge (SFI bridge)

• Security Management Unit (SMU) handles Security Monitor alerts

• Memory Test Unit (MTU) with ECC, memory initialization and MBIST functions

• Hardware I/O Monitor (IOM) for checking digital I/O

• Multifunctional on-chip peripheral unit

– Four asynchronous/synchronous serial channels (ASCLIN) supporting hardware LIN (V1.3, V2.0, V2.1 and J2602) up to 50 MBaud

– Six queued SPI interface lanes (QSPI) with up to 50 Mbit/s master-slave capability

– High Speed Serial Link (HSSL) for serial interprocessor communication up to 320 Mbit/s

– Two serial microsecond bus interfaces (MSC) for serial port expansion to external power devices

– Two MultiCAN+ modules with 6 CAN nodes and 384 freely assignable efficient message objects Data processing via FIFO buffering and gateway data transfer

– 15 Single Edged Nibble Transport (SENT) lanes for connecting sensors

– Up to two FlexRayTM modules with 2 channels (E-Ray) support V2.1

– A Generic Timer Module (GTM) that provides a powerful set of digital signal filtering and timer functions for autonomous and complex I/O management

– One capture/compare 6 module (two cores CCU60 and CCU61)

– One general purpose 12 timer unit (GPT120)

– Five-channel peripheral sensor interface compliant with V1.3 (PSI5)

– Peripheral Sensor Interface (PSI5-S) with Serial PHY

– V2.1-compliant Inter-Integrated Circuit Bus Interface (I2C)

– Optional IEEE802.3 Ethernet MAC with RMII and MII interface (ETH)

• Versatile Successive Approximation ADC (VADC)

– Cluster of 11 independent ADC cores

– Input voltage range from 0v to 5.5V (ADC supply)

• Delta-Sigma Analog-to-Digital Converter (DSADC)

– Ten channels

• Digitally programmable I/O ports

• On-chip debug support OCDS Level 1 (CPU, DMA, on-chip bus)

• Provide dedicated emulation device chip

– Multicore debug, real-time trace and calibration

– Aurora Gigabit Trace Port (AGBT) on some variants

– Four/five-wire JTAG (IEEE 1149.1) or DAP (Device Access Port) interface

• Power management system and on-chip voltage regulator

• Clock generation unit with system PLL and Flexray PLL

• Embedded voltage regulator