Shenzhen Meiyuxin Technology Co., Ltd. [distributing microcontroller MCU] supply F280039CSPN C2000™ 32-bit MCU with CLA, CLB, AES and CAN-FD 120MHz 384KB Flash memory, FPU and TMU Quality assurance New original! ! !

Product Features:

• TMS320C28x 32-bit DSP core at 120 MHz

– IEEE 754 floating point unit (FPU)

• Support for Fast Integer Division (FINTDIV)

– Trigonometry Mathematical Unit (TMU)

• Supports nonlinear proportional-integral-derivative (NLPID) control

– CRC engine and instructions (VCRC)

– Ten hardware breakpoints (including ERAD)

• Programmable Control Law Accelerator (CLA)

– 120MHz

– IEEE 754 single-precision floating-point instructions

– Executes code independently of the main CPU

• On-chip memory

– 384KB (192KW) of Flash memory (ECC protected) on three separate banks

– 69KB (34.5KW) RAM (ECC protected)

– Dual zone security

– Secure boot and JTAG lock

• Clock and system control

– Two internal 10MHz oscillators

– Crystal oscillator or external clock input

– Windowed watchdog timer module

– Missing clock detection circuit

– Dual Clock Comparator (DCC)

• 3.3V I/O design

– Internal VREG generation allows single-supply design

– Brown-out reset (BOR) circuit

• System peripherals

– 6-channel direct memory access (DMA) controller

– 55 independently programmable multiplexed general-purpose input/output (GPIO) pins

– Provides 23 digital inputs on analog pins

– Provides 2 digital inputs/outputs (AGPIO) on analog pins

– Enhanced Peripheral Interrupt Expansion (ePIE)

– Supports multiple low power modes (LPM)

– Embedded Real-Time Analysis and Diagnostics (ERAD)

– Unique identification (UID) number

• Communication peripherals

– One Power Management Bus (PMBus) interface

– Two Inter-Integrated Circuit (I2C) ports

– One Controller Area Network (CAN/DCAN) bus port

– One Controller Area Network (CANFD/MCAN) bus port with flexible data rate

– 2 Serial Peripheral Interface (SPI) ports

– Two UART-compatible serial communication interfaces (SCI)

– Two UART Compatible Local Interconnect Network (LIN) Interfaces

– Fast Serial Interface (FSI) (up to 200Mbps) with one transmitter and one receiver

• Simulation system

– Three 4MSPS 12-bit analog-to-digital converters (ADCs)

• Up to 23 external channels (including two gpdac outputs)

• Four integrated post-processing blocks (PPBs) per ADC

– Four Windowed Comparators (CMPSS) with 12-Bit Reference Digital-to-Analog Converters (DACs)

• Digital glitch filter

– Two 12-bit buffered DAC outputs

• Enhanced Control Peripherals

– 16 ePWM channels including 8 channels with high-resolution capability (150ps resolution)

• Integrated dead-time support

• Integrated Hardware Trip Zone (TZ)

– Three Enhanced Capture (eCAP) modules

• One of the three eCAP modules provides high-resolution capture (HRCAP)

– Two Enhanced Quadrature Encoder Pulse (eQEP) modules supporting CW/CCW modes of operation

– Eight sigma-delta filter module (SDFM) input channels (two parallel filters per channel)

• Standard SDFM data filtering

• Comparator filter for fast operation in case of overestimation or underestimation

– Embedded Pattern Generator (EPG)

• Configurable Logic Blocks (CLBs)

– 4 logic blocks

– Enhancement of existing peripheral functions

– Support location manager solution

• Host Interface Controller (HIC)

– Internal memory accessible from external host

• Background CRC (BGCRC)

– One-cycle CRC operation on 32-bit data

• Advanced Encryption Standard (AES) Accelerator

• Live Firmware Update (LFU)

– Fast context switching from old to new firmware

– Reduced flash bank erase time

• Diagnostic features

– Memory Power On Self Test (MPOST)

– Hardware built-in self-test (HWBIST)

• Target compliance with functional safety standards

– Specifically developed for functional safety applications

– Documentation available for ISO 26262 and IEC 61508 system design

– System functions up to ASIL D and SIL 3

– Hardware functionality up to ASIL B and SIL 2